· Eagle Scriptbeispiele ·

Hier sind die zugehörigen Scriptdateien des Beispiels zur Erstellung von Bibliotheken aufgelistet.

Script des Symbols '166'
Script des Versorgungssymbols 'VCC1GND1'
Script des Packages 'DIL16'
Script des Packages 'SO-16'
Script des Device '74*166'
Weiterführende Links

Farbige Trennlinie

Script des Symbols '166'

Set UNDO_LOG off;
Set Wire_Style 2;
Grid mm 2.54 1 on Dots;


Edit 166.sym;
Text 'Schieberegister, 8 Bit, gated Clock-Eingänge, seriell und parallel in, seriell out, mit Reset';

Layer Symbols;
Pin '/CLR'   In  None Short R0   Pad 0 (-15.24  12.7 ); Wire 0.254 (-10.16  12.7 ) (-10.16  13.97) (-7.62  12.7 ) (-15.24  12.7 );
Pin 'SH_/LD' In  None Short R0   Pad 0 (-15.24  10.16); Wire 0.254 (-10.16   7.62) (-10.16   8.89) (-7.62   7.62) (-12.7    7.62) (-12.7   10.16); Wire 0.254 (-15.24  10.16) ( -7.62  10.16); Circle  0 (-12.7  10.16) (-12.192  10.16);
Pin 'CLKINH' In  None Short R0   Pad 0 (-15.24   5.08); Wire 0.254 (-15.24   5.08) ( -7.62   5.08);
Pin 'CLK'    In  None Short R0   Pad 0 (-15.24   2.54); Wire 0.254 (-15.24   2.54) ( -7.62   2.54);
Pin 'SER'    In  None Short R0   Pad 0 (-15.24  -2.54); Wire 0.254 (-15.24  -2.54) ( -7.62  -2.54);
Pin 'A'      In  None Short R0   Pad 0 (-15.24  -5.08); Wire 0.254 (-15.24  -5.08) ( -7.62  -5.08);
Pin 'B'      In  None Short R0   Pad 0 (-15.24  -7.62); Wire 0.254 (-15.24  -7.62) ( -7.62  -7.62);
Pin 'C'      In  None Short R0   Pad 0 (-15.24 -10.16); Wire 0.254 (-15.24 -10.16) ( -7.62 -10.16);
Pin 'D'      In  None Short R0   Pad 0 (-15.24 -12.7 ); Wire 0.254 (-15.24 -12.7 ) ( -7.62 -12.7 );
Pin 'E'      In  None Short R0   Pad 0 (-15.24 -15.24); Wire 0.254 (-15.24 -15.24) ( -7.62 -15.24);
Pin 'F'      In  None Short R0   Pad 0 (-15.24 -17.78); Wire 0.254 (-15.24 -17.78) ( -7.62 -17.78);
Pin 'G'      In  None Short R0   Pad 0 (-15.24 -20.32); Wire 0.254 (-15.24 -20.32) ( -7.62 -20.32);
Pin 'H'      In  None Short R0   Pad 0 (-15.24 -22.86); Wire 0.254 (-15.24 -22.86) ( -7.62 -22.86);
Pin 'QH'     Out None Short R180 Pad 0 ( 10.16 -22.86); Wire 0.254 ( 10.16 -22.86) (  7.62 -22.86);
Change Size 1.27;
Change Ratio 10;
Text  'R'         R0 (-6.35   12.065);
Text  'M1[Shift]' R0 (-6.35    9.525);
Text  'M2[Load]'  R0 (-6.35    6.985);
Text  '1,3D'      R0 (-6.35   -3.175);
Text  '2,3D'      R0 (-6.35   -5.715);
Text  '2,3D'      R0 (-6.35   -8.255);
Text 'Waagerechte Trennlinien:';
Wire  0.254 (-7.62  -6.35) ( 7.62  -6.35);
Wire  0.254 (-7.62  -8.89) ( 7.62  -8.89);
Wire  0.254 (-7.62 -11.43) ( 7.62 -11.43);
Wire  0.254 (-7.62 -13.97) ( 7.62 -13.97);
Wire  0.254 (-7.62 -16.51) ( 7.62 -16.51);
Wire  0.254 (-7.62 -19.05) ( 7.62 -19.05);
Wire  0.254 (-7.62 -21.59) ( 7.62 -21.59);
Text 'ODER-Gatter:';
Text 'Größer-Gleich-Symbol:';
Wire  0.127 (-6.2611 5.5118) ( -5.6007 5.1054) (-6.2611 4.699);
Wire  0.127 (-6.2611 4.3942) ( -5.6007 4.3942);
Change Size 1.27;
Change Ratio 10;
Text  '1' R0 ( -5.334 4.318);
Text 'Clock-Symbol:';
Wire  0.254 ( -3.81 4.445) ( -2.032 3.81) ( -3.81 3.175);
Text  'C3/1' R0 ( -1.27 3.175);
Text 'Pfeil:';
Wire  0.254 ( 4.826 3.556) ( 5.588  3.81) ( 4.826  4.064);
Wire  0.254 ( 3.81  3.81 ) ( 6.35   3.81) ( 4.826  4.318) ( 4.826  3.302) ( 6.35  3.81);
Text 'ODER-Gatter-Rahmen:';
Wire  0.254 ( -7.62 6.35) ( -3.81 6.35) ( -3.81 1.27) ( -5.08 1.27);
Text 'Steuerkopf:';
Wire  0.254 (-5.08 -1.27) (-5.08  1.27) (-7.62  1.27) (-7.62  15.24) (  7.62  15.24) (  7.62  1.27) (  5.08  1.27) (  5.08 -1.27);
Text 'Symbol-Rahmen:';
Wire  0.254 (-7.62 -24.13) ( 7.62 -24.13) ( 7.62 -1.27) (-7.62 -1.27) (-7.62 -24.13);

Layer pNames;
Change Size 1.27;
Change Ratio 10;
Text  '/CLR'      R180 (-17.78  13.335);
Text  'SH_/LD'    R180 (-17.78  10.795);
Text  'CLKINH'    R180 (-17.78   5.715);
Text  'CLK'       R180 (-17.78   3.175);
Text  'SER'       R180 (-17.78  -1.905);
Text  'A'         R180 (-17.78  -4.445);
Text  'B'         R180 (-17.78  -6.985);
Text  'C'         R180 (-17.78  -9.525);
Text  'D'         R180 (-17.78 -12.065);
Text  'E'         R180 (-17.78 -14.605);
Text  'F'         R180 (-17.78 -17.145);
Text  'G'         R180 (-17.78 -19.685);
Text  'H'         R180 (-17.78 -22.225);
Text  'QH'        R0   ( 12.7  -23.495);

Layer sOrigins;
Wire  0 ( 0  0.635) ( 0 -0.635);
Wire  0 (-0.635  0) ( 0.635  0);

Layer Names;
Change Size 1.27;
Change Ratio 10;
Text  'SRG8'   MR180 (-2.286  14.732);
Text  '>PART'   R0   (-7.62   15.748);

Layer Values;
Change Size 1.27;
Change Ratio 10;
Text  '>VALUE' MR180 (-7.62  -24.638);


Grid Last;
Set UNDO_LOG on;
    

Script des Versorgungssymbols 'VCC1GND1'

Set UNDO_LOG off;
Set Wire_Style 2;
Grid mm 2.54 1 On Dots;


Edit VCC1GND1.sym;
Change Size 1.27;
Change Ratio 10;
Pin 'VCC' Pwr None Middle R270 Pad 1 (0  10.16); Layer Symbols; Wire 0.254 (0  5.08) (0  10.16); Layer Names; Text  'VCC' R90  ( 0.635   1.27);
Pin 'GND' Pwr None Middle R90  Pad 2 (0 -10.16); Layer Symbols; Wire 0.254 (0 -5.08) (0 -10.16); Layer Names; Text  'GND' R270 (-0.635  -1.27);

Layer Names;
Change Size 1.27;
Change Ratio 10;
Text  '>PART' R0 (-2.54 -0.635);


Grid Last;
Set UNDO_LOG on;
    

Script des Packages 'DIL16'

Set UNDO_LOG on;
Set Wire_Style 2;
Grid mm 1.27 2 on Dots;


Edit DIL16.pac;
Change Drill 0.8;
Pad  '1' Square  1.778 ( -8.89 -3.81);
Pad  '2' Octagon 1.778 ( -6.35 -3.81);
Pad  '3' Octagon 1.778 ( -3.81 -3.81);
Pad  '4' Octagon 1.778 ( -1.27 -3.81);
Pad  '5' Octagon 1.778 (  1.27 -3.81);
Pad  '6' Octagon 1.778 (  3.81 -3.81);
Pad  '7' Octagon 1.778 (  6.35 -3.81);
Pad  '8' Octagon 1.778 (  8.89 -3.81);
Pad  '9' Octagon 1.778 (  8.89  3.81);
Pad '10' Octagon 1.778 (  6.35  3.81);
Pad '11' Octagon 1.778 (  3.81  3.81);
Pad '12' Octagon 1.778 (  1.27  3.81);
Pad '13' Octagon 1.778 ( -1.27  3.81);
Pad '14' Octagon 1.778 ( -3.81  3.81);
Pad '15' Octagon 1.778 ( -6.35  3.81);
Pad '16' Octagon 1.778 ( -8.89  3.81);

Layer tPlace;
Wire   0.254 (-10.16 -1.016) (-10.16 -2.54 ) ( 10.16 -2.54 ) ( 10.16  2.54 ) (-10.16  2.54 ) (-10.16  1.016);
Arc CW 0.254 (-10.16  1.016) (-10.16 -1.016) (-10.16 -1.016);

Layer tNames;
Change Size 1.27;
Change Ratio 10;
Text  '>NAME'  R90  (-10.414  -2.54);

Layer tValues;
Change Size 1.27;
Change Ratio 10;
Text  '>VALUE' R270 ( 10.414   2.54);


Grid Last;
Set UNDO_LOG on;
    

Script des Packages 'SO-16'

Set UNDO_LOG off;
Set Wire_Style 2;
Grid mm 2.54 1 on Dots;


Edit SO-16.pac;

Layer Top;
Text 'SMD-Raster  : 1,27 mm x 5,842 mm';
Text 'SMD-Innenmaß: 3,81 mm';
Text 'SMD-Außenmaß: 7,874 mm';
Smd  '1' 0.635  2.032  ( -4.445 -2.921 );
Smd  '2' 0.635  2.032  ( -3.175 -2.921 );
Smd  '3' 0.635  2.032  ( -1.905 -2.921 );
Smd  '4' 0.635  2.032  ( -0.635 -2.921 );
Smd  '5' 0.635  2.032  (  0.635 -2.921 );
Smd  '6' 0.635  2.032  (  1.905 -2.921 );
Smd  '7' 0.635  2.032  (  3.175 -2.921 );
Smd  '8' 0.635  2.032  (  4.445 -2.921 );
Smd  '9' 0.635  2.032  (  4.445  2.921 );
Smd '10' 0.635  2.032  (  3.175  2.921 );
Smd '11' 0.635  2.032  (  1.905  2.921 );
Smd '12' 0.635  2.032  (  0.635  2.921 );
Smd '13' 0.635  2.032  ( -0.635  2.921 );
Smd '14' 0.635  2.032  ( -1.905  2.921 );
Smd '15' 0.635  2.032  ( -3.175  2.921 );
Smd '16' 0.635  2.032  ( -4.445  2.921 );

Layer tPlace;
Text 'Pin 1 Markierung:';
Circle 0 (-4.445 -0.889) (-4.445 -1.397);

Layer tDocu;
Text 'Gehäusebreite (typ):  3,9  mm';
Text 'Gehäuselänge  (max): 10,3  mm';
Text 'Gesamtbreite  (max):  6,2  mm';
Text 'Pinbreite     (max):  0,51 mm';
Text 'Gehäuse mit 0,5 mm Fase unten:';
Wire 0.254 (-5.15 -1.45) ( 5.15 -1.45);
Wire 0.254 (-5.15 -1.95) ( 5.15 -1.95) ( 5.15  1.95) (-5.15  1.95) (-5.15 -1.95);
Text 'Beinchen:';
Rect (-4.7  -1.95) (-4.19 -3.1);
Rect (-3.43 -1.95) (-2.92 -3.1);
Rect (-2.16 -1.95) (-1.65 -3.1);
Rect (-0.89 -1.95) (-0.38 -3.1);
Rect ( 0.38 -1.95) ( 0.89 -3.1);
Rect ( 1.65 -1.95) ( 2.16 -3.1);
Rect ( 2.92 -1.95) ( 3.43 -3.1);
Rect ( 4.19 -1.95) ( 4.7  -3.1);
Rect ( 4.7   1.95) ( 4.19  3.1);
Rect ( 3.43  1.95) ( 2.92  3.1);
Rect ( 2.16  1.95) ( 1.65  3.1);
Rect ( 0.89  1.95) ( 0.38  3.1);
Rect (-0.38  1.95) (-0.89  3.1);
Rect (-1.65  1.95) (-2.16  3.1);
Rect (-2.92  1.95) (-3.43  3.1);
Rect (-4.19  1.95) (-4.7   3.1);

Layer tKeepout;
Rect (-5.588 -4.318) ( 5.588  4.318);

Layer Descript;
Change Size 1;
Change Ratio 10;
Text  'SO-16' R0 (-2.25 -0.5);

Layer tNames;
Change Size 1.27;
Change Ratio 10;
Text  '>NAME'  R90  (-5.588 -4.318);

Layer tValues;
Change Size 1.27;
Change Ratio 10;
Text  '>VALUE' R270 ( 5.588  4.318);


Grid Last;
Set UNDO_LOG on;
    

Script des Device '74*166'

Set UNDO_LOG off;
Set Wire_Style 2;
Grid mm 2.54 1 on Dots;


Edit 74*166.dev;
Prefix 'IC';
Package 'DIL16';
Value On;
Add 166      'IC'  Next 0 (  0     0);
Add VCC1GND1 'PWR' Next 0 (-30.48  0);
Connect   \
          'IC./CLR'    '9'    \
          'IC.SH_/LD'  '15'   \
          'IC.CLKINH'  '6'    \
          'IC.CLK'     '7'    \
          'IC.SER'     '1'    \
          'IC.A'       '2'    \
          'IC.B'       '3'    \
          'IC.C'       '4'    \
          'IC.D'       '5'    \
          'IC.E'       '10'   \
          'IC.F'       '11'   \
          'IC.G'       '12'   \
          'IC.H'       '14'   \
          'IC.QH'      '13'   \
          \
          'PWR.GND'    '8'    \
          'PWR.VCC'    '16'   \
          ;


Grid Last;
Set UNDO_LOG on;
    

Farbige Trennlinie

Weiterführende Links

Eagle Scripte
Eagle-Bibliotheken (Bestellung und Download)

Letzte Änderung: 20.09.2002

SIGEM Elektronik
· Ingenieurbüro ·
Siegfried Gemünde
Rabenauer Str. 13
D-01159 Dresden
Tel.: (03 51) 4 17 93 84
Fax : (03 51) 4 17 93 85
E-Mail: info@sigem-elektronik.de
http://www.sigem-elektronik.de